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Talk Intermediate

Open Source in and for Indian Chips

Approved
Session Description

India's upcoming semiconductor ecosystem has an extensive focus on manufacturing. Comparatively, less is happening on the design side. Companies on the hardware side are adopting open standards, primarily RISC-V. Building a successful ecosystem in a capital efficient manner is a key challenge for the new players. To be successful in hardware requires building large communities of adopters. The more closed the approach, the harder it gets, which is unfortunately the way things are at the moment.


In this talk, I will show how an open source approach can benefit Indian players. To illustrate the benefits, we will look at Thejas32 - CDAC's RISC-V SoC, and compare it with the RP2040/Raspberry Pi Pico. Thejas32 is the first designed-in-India microcontroller that anyone can buy in single quantity. The lack of documentation and design resources holds users back and makes it hard to use it beyond some simple use cases. In comparison, the community based open approach and excellent documentation makes the RP2040/Pico a winner. We will then look at a demo of a low cost open source reference board featuring both the Thejas32 and the Pico and discuss the novel applications this unlocks. We will also look at the documentation and software being developed under this project, and discuss the value it can bring to the fledgling Indian hardware scene.

References

Session Categories

FOSS

Speakers

Shree Kumar
Independent Consultant
Shree Kumar

Shree is a software developer and a FOSS enthusiast. He is best known for KitePhone, a DIY 3D printable open hardware smartphone concept.


Shree is a generalist, with considerable experience in Embedded Systems, High Performance Computing and Computer Graphics. Recently, he has been exploring the intersection of Technology and Policy. This lead to the creation of an open source effort (https://github.com/shreekumar3d/thejas32-testbed) around CDAC's Thejas32 SoC, which is India's first commercially available RISC-V SoC.

Reviews

Reviewer #1 Approved