Minimal Hardware Debugger using Microwatt: Designing, Implementing and Taping Out an Open Debug SoC

This talk presents a technical overview of the winning design Minimal Hardware Debugger utilizing Microwatt Core built as part of the OpenPower Microwatt Design Challenge organized by Chipfoundry and OpenPower Foundation. The project explores how a lightweight, transparent debugging infrastructure can be integrated directly into a custom SoC, enabling low-level hardware and software bring-up without relying on proprietary debug solutions.

We begin with an overview of the architecture of the SoC, focusing on how the debugger interfaces with the Microwatt core through standard open interfaces such as DMI/JTAG and Wishbone, establishing a fully open and auditable debug path.

The session then moves into the integration of the debugger within an ASIC-ready SoC design, covering the complete boot flow and system bring-up. We dive deeper into the ASIC implementation, starting from sourcing and integrating ram blocks from an open-source DFFRAM compiler, incorporating custom macros, and taking the RTL through the full ASIC flow using open-source EDA tools and the PDK (SKY130A).

The design has been taken through synthesis, place-and-route, and sign-off, resulting in a tapeout-ready GDS generated using the OpenFrame platform from ChipFoundry. We will discuss the verification and sign-off steps carried out along the way, including GLS, LVS, and DRC, as well as the practical challenges encountered when working with a fully open-source ASIC toolchain.

Finally, we will briefly share insights from the tapeout experience, as the design has already been submitted for fabrication through ChipFoundry, and discuss the roadmap for developing custom ASIC through complete open source EDA stack and PDKs.

• How to design and integrate a lightweight Debugger interface into a custom SoC.

• Practical Insights to standardised protocols like DMI/JTAG and wishbone.

• A real-world view of taking an ASIC-ready SoC from RTL to tapeout using a fully open-source toolchain, including synthesis, place-and-route, and sign-off.

• An overview of the verification in an open-source ASIC flow, including gate-level simulation, LVS, and DRC.

• An introduction to the open source silicon ecosystemHow to design and integrate a lightweight Debugger interface into a custom SoC.